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Updated: Dec 15, 2025

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ACE: ARIA-CTR Encryption for Low-End Embedded Processors.

Hwajeong Seo1, Hyeokdong Kwon1, Hyunji Kim1

  • 1Division of IT Convergence Engineering, Hansung University, Seoul, 02876, South Korea.

Sensors (Basel, Switzerland)
|July 10, 2020
PubMed
Summary
This summary is machine-generated.

This study presents the first optimized ARIA block cipher implementation for 8-bit AVR microcontrollers. This high-speed cryptographic solution significantly improves execution timing for embedded systems.

Keywords:
ARIAcounter mode of operationelectronic codebook mode of operationembedded processorssoftware implementation

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Area of Science:

  • Cryptography
  • Embedded Systems Engineering
  • Computer Architecture

Background:

  • The ARIA block cipher is a widely used symmetric encryption algorithm.
  • Low-power, resource-constrained embedded systems require efficient cryptographic implementations.
  • Previous ARIA implementations on microcontrollers have faced performance limitations.

Purpose of the Study:

  • To develop the first optimized implementation of the ARIA block cipher specifically for low-end 8-bit AVR microcontrollers.
  • To enhance the speed and efficiency of ARIA encryption on resource-limited embedded platforms.
  • To evaluate the performance of ARIA in both Electronic Codebook (ECB) and Counter (CTR) modes.

Main Methods:

  • Optimized implementation of ARIA primitive operations (rotation, substitute, diffusion layers) for 8-bit AVR architecture.
  • Development of a further optimized ARIA Counter (CTR) mode using pre-computed tables.
  • Performance evaluation based on clock cycles per byte for various ARIA key sizes (128, 192, 256 bits).

Main Results:

  • Achieved 187.1, 216.8, and 246.6 clock cycles per byte for ARIA-CTR with 128, 192, and 256-bit security levels, respectively.
  • Demonstrated significant performance improvements over previous reference implementations, with execution timing enhanced by approximately 69.8%.
  • The optimized ARIA implementation supports both ECB and CTR modes.

Conclusions:

  • The proposed ARIA implementation offers a highly efficient cryptographic solution for 8-bit AVR microcontrollers.
  • This work enables secure communication in low-power embedded devices without compromising performance.
  • The optimized ARIA-CTR mode provides a substantial speed-up for real-time cryptographic applications on embedded systems.