Power-saving design opportunities for wireless intracortical brain-computer interfaces.

Area of Science:

• Neuroscience
• Biomedical Engineering
• Electrical Engineering

Background:

• The performance of wireless intracortical brain-computer interfaces (iBCIs) is often limited by the number of recording channels, which is directly constrained by the implantable system's power budget.
• Current wireless iBCI designs may be over-engineered, prioritizing high-quality recordings at the expense of power efficiency and scalability.

Purpose of the Study:

• To analyze the relationship between neural signal quality and brain-computer interface decoder performance.
• To propose an efficient hardware design for clinically viable iBCIs that balances signal quality with power consumption and channel count.

Main Methods:

• Analysis of neural signals from experimental iBCI recordings in rhesus macaques.
• Evaluation of data from a clinical trial participant using 96-channel Utah multielectrode arrays.

Main Results:

• Signal quality and decoder performance trade-offs were quantified.
• It was determined that current recording iBCI circuit design parameters can be significantly relaxed without compromising performance.
• The proposed efficient hardware design demonstrated potential for order-of-magnitude power savings.

Conclusions:

• Relaxing circuit design parameters in iBCIs can lead to substantial power savings.
• The findings support the development of clinically viable wireless iBCIs with increased channel counts.
• Optimized hardware design is crucial for advancing iBCI technology for broader clinical application.