CMOS Fixed Pattern Noise Elimination Based on Sparse Unidirectional Hybrid Total Variation.

Area of Science:

• Electrical Engineering
• Image Processing
• Semiconductor Technology

Background:

• CMOS image sensor performance has significantly improved, matching CCDs in key metrics like dark current and readout noise.
• However, CMOS technology currently exhibits higher fixed pattern noise (FPN) compared to CCDs due to manufacturing processes.
• FPN removal in CMOS sensors is a critical research area.

Purpose of the Study:

• To develop an effective method for removing fixed pattern noise (FPN) in CMOS image sensors.
• To address limitations of existing optimization models that overlook the structural characteristics of FPN.
• To propose a novel algorithm that accounts for both sparse and random noise components.

Main Methods:

• Development of the sparse unidirectional hybrid total variation (SUTV) algorithm.
• Incorporation of sparse structure of column FPN (CFPN) and random properties of pixel FPN (PFPN) into the model.
• Utilization of adaptive parameter adjustment strategies within the SUTV algorithm.

Main Results:

• The SUTV algorithm demonstrated effective noise reduction capabilities.
• Experimental evaluation using PSNR and SSM metrics confirmed the model's robustness.
• The SUTV model met design expectations for FPN removal.

Conclusions:

• The proposed SUTV algorithm offers an effective solution for reducing fixed pattern noise in CMOS image sensors.
• The method's ability to consider FPN structure enhances its performance over traditional optimization techniques.
• SUTV provides a robust and efficient approach for improving image quality in CMOS sensors.