Efficient implementation of LMS adaptive filter-based FECG extraction on an FPGA

Bhavya Vasudeva1, Puneesh Deora1, Pradhan Mohan Pradhan1

  • 1Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee, Uttarakhand, India.

Summary

This study presents a Field Programmable Gate Array (FPGA) implementation for fetal heart rate (FHR) monitoring. The system accurately extracts fetal electrocardiograms (FECG) using an adaptive filter, improving precision and reducing hardware resource utilization.