Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation.

Area of Science:

• Electrical Engineering
• Integrated Circuit Design

Background:

• Digitally controlled oscillators (DCOs) are crucial components in modern electronic systems.
• Existing DCO designs often face trade-offs between timing resolution, frequency range, and power consumption.
• The integration of DCOs with digital circuits can be challenging due to process compatibility.

Purpose of the Study:

• To present a novel, low-complexity digitally controlled oscillator (DCO) circuit structure.
• To achieve simultaneous high timing resolution and a wide output frequency range.
• To significantly reduce power consumption while maintaining performance.

Main Methods:

• A DCO design combining multiple delay circuits was developed.
• The circuit was implemented using a standard 0.18 µm complementary metal-oxide-semiconductor (CMOS) process.
• Performance was evaluated through chip measurements.

Main Results:

• The DCO achieved a minimum controllable timing resolution of 4.81 ps.
• The chip exhibited a power consumption of 142 µW for a 364 MHz output signal.
• The proposed DCO demonstrated a superior power-to-frequency ratio compared to advanced process designs.

Conclusions:

• The developed DCO offers efficient power consumption for signal generation.
• The all-digital logic gate design facilitates cell-based implementation and process portability.
• The DCO is easily integrable with other digital circuits, enhancing its versatility.