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Numerical Design of Carrier Transporting Layer in Top-Gate InGaZnO Thin-Film Transistors for Controlling Potential
Do-Kyung Kim1, Jihwan Park1, Premkumar Vincent1
1School of Electronic and Electrical Engineering, Kyungpook National University, 80 Daehakro, Bukgu, Daegu, 41566, Republic of Korea.
Abstract:
Top-gate amorphous indium gallium zinc oxide (IGZO) thin-film transistors (TFTs) are designed with numerical analysis to control their electron potential energy. Design simulations show the effects of structural design on the electrical characteristics of these TFTs. In particular, the thicknesses of the channel (tch) and conducting (tc) layers, which play vital roles in TFT electrical performance, are varied from 1 to 50 nm to investigate the effect of thicknesses on the electron potential energies of the channel region and the electrode-semiconductor interfaces. The potential energies are precisely optimized for efficient charge transport, injection, and extraction, thus enhancing the electrical performance of these devices. It is also demonstrated that tch mainly affects mobility and threshold voltage, while tc mainly affects on-current. An acceptable threshold voltage of 0.55 V and high mobility of 14.7 cm²V-1s-1 are obtained with a tch of 30 nm and tc of 10 nm. Controllability of the electron potential energies and electrical performance of IGZO TFTs by means of structural design will contribute to realization of next-generation displays that have large areas and high resolutions.
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