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An Ultra-Low-Power Embedded Processor with Variable Micro-Architecture.

Wenheng Ma1, Qiao Cheng1, Yudi Gao1

  • 1Faculty of Automation and Information Engineering, Xi'an University of Technology, Xi'an 710048, China.

Micromachines
|April 3, 2021
PubMed
Summary

This study introduces an ultra-low-power processor with a variable micro-architecture, significantly reducing energy consumption in embedded systems. The innovative design achieves substantial power savings without compromising performance, making it ideal for diverse workloads.

Keywords:
embedded processorenergy efficiencypipeline registerultra-low-powervariable micro-architecture

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Area of Science:

  • Computer Engineering
  • Electrical Engineering
  • Microprocessor Design

Background:

  • Embedded processors face a trade-off between peak performance and power consumption.
  • High-performance features like pipeline registers and dynamic branch predictors significantly impact energy efficiency, especially under low workloads.
  • Optimizing energy distribution in embedded systems is crucial for modern device design.

Purpose of the Study:

  • To evaluate energy distribution in various embedded processors.
  • To propose an ultra-low-power processor with a variable micro-architecture for improved energy efficiency.
  • To enable software control over processor modes for dynamic power management.

Main Methods:

  • Analysis of energy distribution in embedded processors, identifying key components affecting power consumption.
  • Design of a 4-stage pipeline core with a Gshare branch predictor and a mode register (MR) for software-controlled mode switching.
  • Implementation in 40 nm technology and simulation using Embench benchmarks.

Main Results:

  • The proposed processor offers High-Performance (H-mode), Normal (N-mode), and Low-Power (L-mode) operations.
  • N-mode and L-mode consume 16.08% and 41.37% less power than H-mode on average, with potential savings up to 25.36% and 49.30% respectively.
  • Energy per instruction is reduced by 7.78% (N-mode) and 51.57% (L-mode) compared to a baseline core, with a minimal 7.19% area increase.

Conclusions:

  • The variable micro-architecture effectively reduces power consumption in embedded processors for low-workload scenarios.
  • Software-controlled mode switching allows dynamic adaptation to workload demands, optimizing energy efficiency.
  • The proposed design presents a viable solution for energy-efficient embedded systems without significant overhead.