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Published on: August 3, 2018
A Low-Power 12-Bit 20 MS/s Asynchronously Controlled SAR ADC for WAVE ITS Sensor Based Applications.
Khuram Shehzad1, Deeksha Verma1, Danial Khan1
1Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.
This study presents a low-power, 12-bit analog-to-digital converter (ADC) for intelligent transportation systems. The novel design significantly reduces energy consumption in the capacitive digital-to-analog converter (CDAC) and comparator, enabling efficient sensor applications.
Area of Science:
- Electrical Engineering
- Computer Engineering
Background:
- Intelligent Transportation Systems (ITS) and Wireless Access for Vehicular Environments (WAVE) require efficient sensor data acquisition.
- Low-power, high-performance analog-to-digital converters (ADCs) are crucial for these sensor-based applications.
- Existing ADC architectures face challenges in balancing power consumption, speed, and performance.
Purpose of the Study:
- To develop a low-power, high-performance 12-bit successive approximation register (SAR) analog-to-digital converter (ADC).
- To optimize the ADC architecture for reduced power consumption and enhanced performance in WAVE/ITS sensor applications.
- To address power consumption and kick-back issues in critical ADC components.
Main Methods:
- Implementation of a common mode charge recovery (CMCR) switching process for the capacitive digital-to-analog converter (CDAC) to minimize switching energy.
- Design of a mutated dynamic-latch comparator with cascode for high-speed, low-power operation and mitigation of kick-back noise.
- Employment of an asynchronous topology for the logic part to enhance flexibility and performance.
- Fabrication using 65 nm CMOS process technology.
Main Results:
- The proposed CMCR switching technique achieved a 56.3% reduction in switching energy compared to conventional methods.
- The implemented ADC achieved a signal-to-noise distortion ratio (SNDR) of 65.44 dB at Nyquist frequency.
- The device operated at a sampling frequency of 20 MS/s while consuming only 472.2 µW with a 1 V power supply.
- The active area of the fabricated chip was 0.14 mm².
Conclusions:
- The developed asynchronous SAR ADC offers a significant improvement in power efficiency for WAVE/ITS sensor applications.
- The proposed energy-saving switching method and comparator design effectively address key challenges in ADC development.
- This low-power, high-performance ADC is well-suited for resource-constrained intelligent transportation systems.
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