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Computing the sparse matrix vector product using block-based kernels without zero padding on processors with AVX-512

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  • 1Application Group, Max Planck Computing and Data Facility, Garching, Allemagne.

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Summary
This summary is machine-generated.

This study introduces new AVX-512 sparse matrix-vector product (SpMV) kernels that eliminate zero padding for improved High Performance Computing (HPC) efficiency. The novel approach offers significant performance gains for scientific applications.

Keywords:
Code OptimizationHPCSIMDSpMVVectorization

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Area of Science:

  • Computer Science
  • Numerical Analysis
  • High Performance Computing

Background:

  • Sparse matrix-vector product (SpMV) is crucial for scientific applications.
  • Existing block-based SpMV kernels achieve high performance but require zero padding.
  • Zero padding complicates practical implementation and memory storage.

Purpose of the Study:

  • To develop efficient SpMV kernels utilizing AVX-512 instruction sets.
  • To enable block-based SpMV without zero padding in matrix storage.
  • To enhance the performance of SpMV operations on modern CPU architectures.

Main Methods:

  • Proposed new SpMV kernels leveraging the AVX-512 instruction set.
  • Introduced mask-based sparse matrix formats and assembly-optimized kernels.
  • Developed a predictive method for optimal kernel selection via interpolation.
  • Compared performance against Intel MKL CSR and CSR5 on benchmark matrices.

Main Results:

  • Achieved significant performance improvements for SpMV operations.
  • Demonstrated effectiveness in both sequential and parallel execution scenarios.
  • Eliminated the need for zero padding in block-based SpMV implementations.
  • Validated performance gains on standard benchmark matrices.

Conclusions:

  • The proposed AVX-512 kernels offer a practical and efficient solution for SpMV.
  • The mask-based formats and predictive method enhance usability and performance.
  • The open-source library SPC5 provides access to these optimized kernels.