An RFID-Based Self-Biased 40 nm Low Power LDO Regulator for IoT Applications.

Area of Science:

• Electrical Engineering
• Integrated Circuit Design
• Internet of Things (IoT)

Background:

• Emerging IoT applications require low-power, compact regulators for nodes with limited accessibility and harsh environments.
• Power and area constraints are critical concerns for embedded IoT systems.

Purpose of the Study:

• To design a 1.1 V low dropout (LDO) linear regulator specifically for embedded IoT nodes.
• To address power and area constraints using advanced ultra-low power techniques.

Main Methods:

• Utilized state-of-the-art, variability-aware, resistor-less, sub-threshold biased CMOS-only configurations.
• Integrated internal compensation with embedded Miller and load capacitances (18 pF and 10 pF).
• Designed for 40 nm technology with a focus on low active area and ultra-low power consumption.

Main Results:

• Achieved a 1.1 V LDO with 200 mV dropout voltage and 1.3 V minimum input voltage.
• Supplies 1 mA maximum load current with only 0.8 uA quiescent current.
• Attained 84% efficiency, nearing the maximum achievable for the given dropout voltage, with 1 μW total power consumption and a die size under 0.007 mm2.

Conclusions:

• The designed LDO regulator effectively meets the stringent power and area requirements for embedded IoT applications.
• The ultra-low power, compact design enables reliable operation in challenging environments and for nodes with limited accessibility.
• This work presents a significant advancement for power-efficient IoT node design.