Improved Device Distribution in High-Performance SiN_x Resistive Random Access Memory via Arsenic Ion Implantation

Large device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiN_x RRAM device is realized via arsenic ion (As⁺) implantation. Besides, the As⁺-implanted SiN_x RRAM device exhibits much tighter cycle-to-cycle distribution than the nonimplanted device. The As⁺-implanted SiN_x device further exhibits excellent performance, which shows high stability and a large 1.73 × 10³ resistance window at 85 °C retention for 10⁴ s, and a large 10³ resistance window after 10⁵ cycles of the pulsed endurance test. The current-voltage characteristics of high- and low-resistance states were both analyzed as space-charge-limited conduction mechanism. From the simulated defect distribution in the SiN_x layer, a microscopic model was established, and the formation and rupture of defect-conductive paths were proposed for the resistance switching behavior. Therefore, the reason for such high device performance can be attributed to the sufficient defects created by As⁺ implantation that leads to low forming and operation power.