Complementary Memtransistor-Based Multilayer Neural Networks for Online Supervised Learning Through...

Area of Science:

• Neuroscience
• Computer Engineering
• Materials Science

Background:

• Multilayer neural networks (MNNs) are crucial for complex computations.
• Implementing supervised learning (SL) in hardware efficiently remains a challenge.
• Existing hardware approaches often require complex supervising modules and consume significant power.

Purpose of the Study:

• To propose a complete hardware-based architecture for MNNs implementing an extended supervised learning algorithm.
• To utilize complementary memtransistors (C-MTs) as efficient electrical synapses.
• To reduce chip area and power consumption compared to conventional designs.

Main Methods:

• A hardware architecture for MNNs was designed, incorporating electronic synapses, neurons, and periphery circuitry.
• Complementary memtransistors (C-MTs) were employed as electrical synapses.
• The extended remote supervised method (ReSuMe) was implemented using spike-timing-dependent plasticity (STDP) and anti-STDP rules on C-MTs.

Main Results:

• The proposed C-MT-based MNN architecture successfully implemented the extended ReSuMe algorithm for SL.
• Significant reductions in chip area and power consumption for weight updating were achieved compared to single memtransistor (S-MT) designs.
• The system demonstrated successful performance on the XOR problem and MNIST recognition benchmarks.

Conclusions:

• The developed hardware architecture offers an efficient and low-power solution for MNNs implementing supervised learning.
• C-MTs provide a promising approach for creating compact and energy-efficient electronic synapses.
• The study validates the feasibility of the proposed system for complex pattern recognition tasks.