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Updated: Nov 2, 2025

Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots
Published on: November 1, 2013
Ge0.95Sn0.05 Gate-All-Around p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Sub-3 nm Nanowire
Yuye Kang1, Shengqiang Xu1, Kaizhen Han1
1Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576, Singapore.
Abstract:
We demonstrate Ge0.95Sn0.05 p-channel gate-all-around field-effect transistors (p-GAAFETs) with sub-3 nm nanowire width (WNW) on a GeSn-on-insulator (GeSnOI) substrate using a top-down fabrication process. Thanks to the excellent gate control by employing an aggressively scaled nanowire structure, Ge0.95Sn0.05 p-GAAFETs exhibit a small subthreshold swing (SS) of 66 mV/decade, a decent on-current/off-current (ION/IOFF) ratio of ∼1.2 × 106, and a high-field effective hole mobility (μeff) of ∼115 cm2/(V s). In addition, we also investigate quantum confinement effects in extremely scaled GeSn nanowires, including threshold voltage (VTH) shift and IOFF reduction with continuous scaling of WNW under 10 nm. The phenomena observed from experimental results are substantiated by the calculation of GeSn bandgap and TCAD simulation of electrical characteristics of devices with sub-10 nm WNW. This study suggests Ge-based nanowire p-FETs with extremely scaled dimension hold promise to deliver good performance to enable further scaling for future technology nodes.
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