Interconnect-Free Multibit Arithmetic and Logic Unit in a Single Reconfigurable 3 μm² Plasmonic Cavity

Area of Science:

• Optoelectronics
• Nanotechnology
• Integrated Circuits

Background:

• Conventional integrated circuits face limitations due to the interconnect bottleneck, causing power dissipation and limiting clock rates.
• Optical interchip communication offers a faster, energy-saving alternative but lacks generic on-chip optical processing capabilities.
• Existing solutions require complex designs and cascaded circuitry for optical information processing.

Purpose of the Study:

• To develop interconnect-free, ultracompact plasmonic Boolean logic gates.
• To demonstrate the reconfiguration of these gates into computing arithmetic logic units (ALUs) without redesign.
• To address the limitations of conventional integrated circuits in information processing.

Main Methods:

• Utilized metal plasmons, leveraging their dual optical and electronic compatibility.
• Engineered a single 2.6 μm² planar gold cavity to tailor the plasmon mode landscape.
• Demonstrated all 2-input logic gates and their reconfiguration using multi-input excitation and phase control.

Main Results:

• Successfully forged and demonstrated interconnect-free, ultracompact plasmonic Boolean logic gates.
• Showcased facile reconfiguration of these gates into computing ALUs without cascaded circuitry.
• Achieved an arithmetic 2-bit adder through multi-input excitation and phase control on the plasmonic platform.

Conclusions:

• Metal plasmonics offer a viable platform for realizing reconfigurable, interconnect-free optical computing elements.
• The developed plasmonic logic gates and ALUs overcome the interconnect bottleneck in conventional electronics.
• This approach enables higher complexity and potential for advanced optical information processing on a single chip.