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Influence of Graphite Layer on Electronic Properties of MgO/6H-SiC(0001) Interface
Rafał Lewandków1, Piotr Mazur1, Artur Trembułowicz1
1Institute of Experimental Physics, University of Wroclaw, pl. M. Borna 9, 50-204 Wrocław, Poland.
Materials (Basel, Switzerland)
|August 7, 2021
Summary
This study explores magnesium oxide (MgO) layers for silicon carbide (SiC) MOSFETs. MgO on graphitized SiC showed deeper valence band maximum, impacting gate material potential.
Area of Science:
- Materials Science
- Semiconductor Physics
- Surface Science
Background:
- Silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) are crucial for power electronics.
- Developing stable and efficient gate dielectrics is essential for advanced SiC MOSFET performance.
- Magnesium oxide (MgO) is explored as a potential alternative gate material.
Purpose of the Study:
- Investigate the potential of magnesium oxide (MgO) as a gate material for SiC MOSFET structures.
- Analyze the electronic properties of MgO layers on SiC(0001) and graphitized SiC(0001) surfaces.
- Determine the feasibility of using MgO in SiC-based devices.
Main Methods:
- In situ investigation under ultrahigh vacuum (UHV) conditions.
- Reactive evaporation method for depositing MgO layers.
- X-ray and UV photoelectron spectroscopy (XPS, UPS) for surface analysis.
- Thermal annealing in UHV to form graphite layers on SiC(0001).
Main Results:
- Confirmed the formation of MgO compounds on both SiC(0001) and MgO/graphite/SiC(0001) systems.
- Constructed energy level diagrams for both investigated systems.
- Observed that the valence band maximum of MgO layers was positioned deeper on the graphitized SiC surface compared to the bare SiC(0001) surface.
Conclusions:
- Magnesium oxide layers can be successfully formed on SiC surfaces using reactive evaporation.
- The presence of a graphite interlayer modifies the electronic properties of MgO/SiC interfaces.
- The deeper embedding of the MgO valence band maximum on graphitized SiC suggests potential implications for device performance and interface engineering.
