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Related Experiment Videos

Moore's Law revisited through Intel chip density.

David Burg1,2,3, Jesse H Ausubel3

  • 1Eastern Research and Development Center, Ariel, Israel.

Plos One
|August 18, 2021
PubMed
Summary

Transistor density in Intel processors follows a biphasic sigmoidal curve, not simple exponential growth. This pattern reveals six waves of advancement, offering insights into processor manufacturing and future limitations.

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Area of Science:

  • Semiconductor physics
  • Computer engineering
  • Materials science

Background:

  • Gordon Moore's observation posits exponential growth in transistor count per integrated circuit, doubling every 12-24 months.
  • Debate exists on whether simple exponential growth accurately models computer processor evolution dynamics.
  • Processor evolution involves both increased transistor integration and miniaturization.

Purpose of the Study:

  • To analyze the historical evolution of transistor density in computer processors.
  • To determine if transistor density follows exponential or other growth models.
  • To identify patterns and potential future limits in processor manufacturing.

Main Methods:

  • Analysis of transistor density in Intel processors from 1959 to 2013.

Related Experiment Videos

  • Modeling processor evolution using a single measure: transistors per unit area (chip density).
  • Fitting the data to growth curves to identify characteristic times and patterns.

    • Main Results:

    • Transistor density growth is consistent with a biphasic sigmoidal curve, not simple exponential growth.
    • The model indicates characteristic times of 9.5 years for the sigmoidal curve.
    • Six distinct waves of transistor density increase were identified, each with rapid growth followed by stagnation.

    Conclusions:

    • Processor evolution is characterized by distinct phases of rapid advancement and slower growth.
    • Understanding these biphasic sigmoidal patterns provides insight into manufacturing processes.
    • This analysis highlights potential future limitations and areas for overcoming them in processor development.