Highly parallelized memristive binary neural network.

Area of Science:

• * Computer Engineering
• * Artificial Intelligence Hardware

Background:

• * Memristors are emerging non-volatile memory devices with in-memory computing capabilities, making them attractive for deep learning hardware.
• * Representing deep neural network weights as floating-point numbers in memristors leads to accuracy loss and increased programming time.
• * Binarized Neural Networks (BNNs) use binary weights (+1/-1), offering potential for reduced resource consumption.

Purpose of the Study:

• * To propose a comprehensive solution for implementing Binarized Neural Networks (BNNs) using memristor technology.
• * To enhance memristor crossbar design for efficient deep learning computations.
• * To simplify the integration of memristive BNNs within deep learning circuits.

Main Methods:

• * Binarization of deep neural network weights and activation values to +1 and -1.
• * Modification of memristor crossbar architecture to ensure constant input voltage signs.
• * Integration of a processing circuit for batch-normalization and binarization to enable direct layer-to-layer data transfer.

Main Results:

• * Reduced storage space and programming time for memristor-based deep learning.
• * Simplified inputting of feature map elements by eliminating the need for pre-determining input voltage signs.
• * Enabled direct use of output from one convolution layer as input for the next.

Conclusions:

• * The proposed solution offers a complete and efficient implementation of memristive BNNs.
• * The design improvements facilitate simpler programming and faster inference in memristor deep learning circuits.
• * This work advances the development of energy-efficient and high-performance AI hardware.