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Updated: Oct 13, 2025

Plasma-assisted Molecular Beam Epitaxy of N-polar InAlN-barrier High-electron-mobility Transistors
Published on: November 24, 2016
A quantitative approach for trap analysis between Al0.25Ga0.75N and GaN in high electron mobility transistors
Walid Amir1, Ju-Won Shin1, Ki-Yong Shin1
1Department of Electrical, Electronic and Computer Engineering, University of Ulsan, Ulsan, 44610, Korea.
Abstract:
The characteristics of traps between the Al0.25Ga0.75N barrier and the GaN channel layer in a high-electron-mobility-transistors (HEMTs) were investigated. The interface traps at the Al0.25Ga0.75N/GaN interface as well as the border traps were experimentally analyzed because the Al0.25Ga0.75N barrier layer functions as a dielectric owing to its high dielectric constant. The interface trap density Dit and border trap density Nbt were extracted from a long-channel field-effect transistor (FET), conventionally known as a FATFET structure, via frequency-dependent capacitance-voltage (C-V) and conductance-voltage (G-V) measurements. The minimum Dit value extracted by the conventional conductance method was 2.5 × 1012 cm-2·eV-1, which agreed well with the actual transistor subthreshold swing of around 142 mV·dec-1. The border trap density Nbt was also extracted from the frequency-dependent C-V characteristics using the distributed circuit model, and the extracted value was 1.5 × 1019 cm-3·eV-1. Low-frequency (1/f) noise measurement provided a clearer picture of the trapping-detrapping phenomena in the Al0.25Ga0.75N layer. The value of the border trap density extracted using the carrier-number-fluctuation (CNF) model was 1.3 × 1019 cm-3·eV-1, which is of a similar level to the extracted value from the distributed circuit model.
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