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Alternative negative weight for simpler hardware implementation of synapse device based neuromorphic system.

Geonhui Han¹, Chuljun Lee¹, Jae-Eun Lee¹

¹Department of Electronic Materials Engineering, Kwangwoon University, Seoul, 01897, Republic of Korea.

Scientific Reports

|December 2, 2021

Summary

Researchers developed a simpler hardware method, the "weight shifter," to implement negative synaptic weights in hardware deep learning neural networks (H-DNNs). This innovation reduces device count, power consumption, and circuit complexity for efficient H-DNNs.

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Area of Science:

Neuromorphic Engineering
Computer Engineering
Electrical Engineering

Background:

Software-based deep learning neural networks (S-DNNs) are increasingly used for data analysis.
Hardware deep learning neural networks (H-DNNs) offer an alternative to Von Neumann architectures.
Implementing synaptic weights, especially negative values, in H-DNNs presents hardware challenges.

Purpose of the Study:

To propose a simpler method for realizing negative synaptic weights in H-DNNs.
To address the limitations of using pairs of devices for negative weights.
To reduce hardware resource requirements and circuit complexity.

Main Methods:

Introduced a novel 'weight shifter' circuit for negative weight implementation.
Investigated the theoretical, numerical, and circuit aspects of the weight shifter.
Successfully implemented the H-DNN circuit with the weight shifter on a printed circuit board.

Main Results:

The proposed weight shifter simplifies the realization of negative synaptic weights.
This method reduces the need for multiple synapse devices per weight.
The H-DNN circuit demonstrated successful integration and functionality.

Conclusions:

The weight shifter offers a more efficient approach to H-DNN design.
This innovation can lead to reduced power consumption and smaller hardware footprints.
The successful PCB implementation validates the practicality of the proposed method.