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Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding.

Zhong Fang1, Peng You1, Yijie Jia2

  • 1School of Mechanical Engineering, Nanjing University of Science and Technology, Nanjing 210094, China.

Micromachines
|December 24, 2021
PubMed
Summary

Wafer-level 3D integration using Poly(diphenyldiacetylene) (PDAP) polymer bonding enables high-density, low-cost system-on-chip fabrication. This method is ideal for integrating micro-electromechanical systems (MEMS) with complementary metal-oxide-semiconductor (CMOS) chips.

Keywords:
3D integrationSOI waferadhesive bondingpoly (diallyl phthalate)wafer thinning

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Nanotechnology

Background:

  • Three-dimensional (3D) integration offers a pathway to high function density and low-cost system-level integration.
  • Wafer-level integration is crucial for advanced microelectronic and micro-electromechanical systems (MEMS) fabrication.
  • Polymer-based bonding presents an alternative to traditional methods for 3D integration.

Purpose of the Study:

  • To investigate the effectiveness of Poly(diphenyldiacetylene) (PDAP) as an intermediate bonding polymer for wafer-level 3D integration.
  • To determine the influence of various process parameters on adhesive bonding performance.
  • To optimize the 3D integration process for MEMS and integrated circuit (IC) applications.

Main Methods:

  • Wafer-level 3D integration using PDAP as an intermediate bonding polymer.
  • Si-Glass adhesive bonding tests to evaluate the effects of bonding pressure, pre-curing, spin coating, and cleanliness.
  • Process optimization focusing on silicon handle-layer etching, PDAP layer etching, and gold (Au) pillar electroplating.
  • Fabrication and testing of micro-bolometer and micro-bridge resistor array applications.

Main Results:

  • Optimal procedure parameters for PDAP adhesive bonding were identified and applied.
  • Significant influence of bonding pressure, pre-curing, spin coating, and cleanliness on adhesive bonding effects was confirmed.
  • Optimized process conditions were achieved for 3D integration, including etching and Au pillar electroplating.
  • Successful 3D integration of micro-bolometer and micro-bridge resistor arrays was demonstrated.

Conclusions:

  • PDAP adhesive bonding is a viable technique for wafer-level 3D integration.
  • This approach is suitable for system-on-chip fabrication, particularly for MEMS and IC integration.
  • The technology is especially beneficial for creating low-cost, suspended microstructures on CMOS chips.