Device quantization policy in variation-aware in-memory computing design.

Area of Science:

• Computer Engineering
• Materials Science
• Artificial Intelligence

Background:

• Practical memory devices exhibit significant variations and limited dynamic ranges, impacting in-memory computing (IMC) performance.
• Optimizing IMC requires co-optimization of system performance, accuracy, power, and area.

Purpose of the Study:

• To investigate device quantization for in-memory computing (IMC) considering real-world memory device limitations.
• To achieve quantitative co-optimization of accuracy, power, and area in IMC systems.

Main Methods:

• Exploring architecture-level solutions like weight-separate mapping and multiple cells per weight.
• Implementing algorithm-level strategies such as VGG-like algorithms and classifier layer fine-tuning.
• Analyzing the impact of device variation and dynamic range on IMC performance.

Main Results:

• Weight-separate mapping, VGG-like algorithms, multiple cells per weight, and classifier fine-tuning effectively mitigate inference accuracy loss caused by device variation.
• These methods enable lower weight precision, enhancing area and energy efficiency.
• Developing low-conductance and low-variability memory devices is crucial for energy- and area-efficient IMC.

Conclusions:

• Prioritize the development of low-variability memory devices for efficient IMC.
• Low bit precision and limited memory windows are less critical concerns compared to device variability.