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Electrical synapses found in all nervous systems play important and unique roles. In these synapses, the presynaptic and postsynaptic membranes are very close together (3.5 nm) and are actually physically connected by channel proteins forming gap junctions.
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Researchers developed a novel two-transistor (2T) device using WSe2 ferroelectric transistors to efficiently implement reward-modulated spike-timing-dependent plasticity (R-STDP) for reinforcement learning (RL). This breakthrough enables low-power, area-efficient hardware for artificial general intelligence.

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Area of Science:

  • Neuromorphic Engineering
  • Artificial Intelligence
  • Materials Science

Background:

  • Reward-modulated spike-timing-dependent plasticity (R-STDP) is a key brain-inspired rule for reinforcement learning (RL).
  • Existing hardware implementations of R-STDP using silicon CMOS technology suffer from high power consumption and large footprints.
  • There is a need for more efficient and compact hardware solutions for R-STDP to advance artificial general intelligence.

Purpose of the Study:

  • To demonstrate a novel two-transistor (2T) device for efficient hardware implementation of R-STDP.
  • To achieve reconfigurable synaptic behavior and multilevel conductance states using WSe2 ferroelectric transistors.
  • To validate the R-STDP learning rule for training spiking neural networks on a challenging task.

Main Methods:

  • Fabrication and characterization of a parallel-structured 2T unit based on WSe2 ferroelectric transistors.
  • Exploitation of ferroelectric polarization to achieve reconfigurable n-type and p-type channel behavior.
  • Implementation of R-STDP learning rules by applying reward signals to the (anti-)STDP components of the 2T cell.

Main Results:

  • The 2T unit demonstrated reconfigurable polarity, multilevel (>6 bit) conductance states, ultralow nonlinearity, and a large Gmax/Gmin ratio (30).
  • Successful realization of R-STDP learning rules for training a spiking neural network.
  • The trained network solved the classical cart-pole problem with ultralow power consumption (32 pJ per forward process) and high area efficiency (100 µm²).

Conclusions:

  • The developed WSe2 ferroelectric 2T device offers a promising pathway for low-power and area-efficient hardware implementation of R-STDP.
  • This technology has significant potential for advancing reinforcement learning applications and artificial general intelligence.
  • The demonstrated device overcomes the limitations of conventional CMOS-based R-STDP hardware.