Analysis for DC and RF Characteristics Recessed-Gate GaN MOSFET Using Stacked TiO₂/Si₃N₄ Dual-Layer Insulator.

Area of Science:

• Semiconductor device physics
• Materials science
• Electrical engineering

Background:

• Gallium Nitride (GaN) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) are crucial for high-power and high-frequency applications.
• Self-heating effects (SHEs) can significantly impact the electrical characteristics and reliability of semiconductor devices.
• Stacked dielectric layers, such as TiO2/Si3N4, are explored to enhance MOSFET performance by increasing capacitance.

Purpose of the Study:

• To investigate the impact of self-heating effects (SHEs) on the electrical characteristics of GaN MOSFETs with a stacked TiO2/Si3N4 dual-layer insulator.
• To compare the performance of GaN MOSFETs with stacked TiO2/Si3N4 insulators against those with a Si3N4 single-layer insulator under SHEs.
• To analyze the operational mechanisms of GaN MOSFETs influenced by SHEs for high-power and high-frequency applications.

Main Methods:

• Rigorous Technology Computer-Aided Design (TCAD) simulations were employed to model and analyze the devices.
• GaN MOSFETs with both stacked TiO2/Si3N4 and Si3N4 single-layer insulators were simulated.
• Electrical characteristics, temperature distribution, and performance metrics under varying conditions were evaluated.

Main Results:

• The stacked TiO2/Si3N4 GaN MOSFET exhibited improved maximum on-state current (743.8 mA/mm) due to higher oxide capacitance compared to Si3N4 single-layer devices.
• SHEs increased the device temperature to a maximum of 409.89 K, leading to performance degradation.
• Compared to devices without SHEs, the stacked TiO2/Si3N4 GaN MOSFET showed a 25% decrease in maximum on-state current and transconductance, a significant increase in R_on, and a 26% reduction in cut-off frequency.

Conclusions:

• While SHEs degrade the performance of stacked TiO2/Si3N4 GaN MOSFETs, their overall electrical performance remains superior to GaN MOSFETs with Si3N4 single-layer insulators.
• The stacked dielectric structure offers advantages in capacitance, leading to better intrinsic performance before considering thermal effects.
• Understanding and mitigating SHEs is critical for optimizing the design and application of high-performance GaN MOSFETs.