Device performances analysis of p-type doped silicene-based field effect transistor using SPICE-compatible model

Area of Science:

• Nanoelectronics
• Solid-state physics
• Materials science

Background:

• Moore's Law limitations necessitate exploring beyond-CMOS technologies.
• Silicene emerges as a promising 2D material for next-generation transistors.
• Field-effect transistors (FETs) are fundamental components in digital electronics.

Purpose of the Study:

• To propose a SPICE-compatible model for p-type silicene FETs.
• To evaluate the performance of silicene FETs for digital switching applications.
• To benchmark silicene FETs against other low-dimensional FETs.

Main Methods:

• Development of a SPICE-compatible model for uniformly Aluminium-doped silicene FETs.
• Simulation of device performance characteristics.
• Comparative analysis of on-to-off current ratio, subthreshold swing, and drain-induced barrier lowering.

Main Results:

• The proposed p-type silicene FET model demonstrates competitive performance.
• Silicene FET performance is comparable to various low-dimensional FETs.
• The model is suitable for digital switching applications.

Conclusions:

• The developed SPICE-compatible silicene FET model is a viable approach for future nanoelectronic devices.
• Silicene FETs offer promising characteristics for beyond-Moore scaling.
• Further research should focus on circuit-level simulations and advanced applications.