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Large Scale Energy Efficient Sensor Network Routing Using a Quantum Processor Unit
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Compact Finite Field Multiplication Processor Structure for Cryptographic Algorithms in IoT Devices with Limited

Atef Ibrahim1,2, Fayez Gebali2

  • 1Computer Engineering Department, College of Computer Engineering and Sciences, Prince Sattam Bin Abdulaziz University, Al-Kharj 16278, Saudi Arabia.

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Summary

This study introduces a compact, efficient finite field multiplier for Internet of Things (IoT) devices. The novel design significantly reduces area and energy consumption, enhancing security for resource-constrained applications.

Keywords:
IoT applicationsIoT devicesIoT securitycryptographic processorscryptographyfinite-field multipliersprocessor arrayssecurity of cyber-physical systemultra low-power devicesword-serial multipliers

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Area of Science:

  • Computer Engineering
  • Cryptography
  • Embedded Systems

Background:

  • Internet of Things (IoT) applications face security vulnerabilities due to rapid evolution.
  • Limited computing resources in IoT devices hinder the implementation of complex cryptographic algorithms.
  • Efficient cryptographic operations are crucial for securing IoT networks and data.

Purpose of the Study:

  • To develop a compact and efficient finite field multiplier for resource-constrained IoT devices.
  • To address the computational complexity of cryptographic algorithms in IoT security.
  • To propose a VLSI-implementable multiplier structure with modularity and regularity.

Main Methods:

  • Developed a word-based serial-in/serial-out finite field multiplier.
  • Employed a systematic technique for mapping iterative algorithms onto processor arrays.
  • Utilized VLSI design principles focusing on modularity and regularity.

Main Results:

  • The proposed multiplier structure offers a compact and efficient solution for IoT devices.
  • ASIC experimental results show significant reductions in area (up to 97.7%) and energy consumption (up to 99.2%).
  • The design allows control over system latency, area, and energy by managing processor word size.

Conclusions:

  • The developed finite field multiplier is suitable for enhancing security in IoT devices with limited resources.
  • The modular and regular structure facilitates easy VLSI implementation.
  • This work contributes to more secure and energy-efficient IoT ecosystems.