Skew-Circulant-Matrix-Based Harmonic-Canceling Synthesizer for BIST Applications

Area of Science:

• Electrical Engineering
• Integrated Circuit Design
• Signal Processing

Background:

• Semiconductor testing constitutes a significant portion of production costs.
• Built-In Self-Test (BIST) offers a solution by integrating test functions onto the chip.
• Existing BIST methods face challenges in cost-efficiency and precision.

Purpose of the Study:

• To develop a cost-effective single-tone generator for BIST applications.
• To address the precision challenges in implementing Harmonic-Canceling (HC) techniques.
• To improve the linearity and reduce harmonic distortion in generated test signals.

Main Methods:

• Implementation of a Harmonic-Canceling (HC) synthesizer.
• Utilizing skew-circulant matrices (SCMs) for precise irrational coefficient generation.
• Design and fabrication in 180 nm CMOS technology.

Main Results:

• The proposed HC synthesizer effectively filters harmonics up to the 47th harmonic.
• Generated signals cover a frequency range from 0.8 to 100 MHz.
• Achieved a maximum Spurious-Free Dynamic Range (SFDR) of 66 dB.

Conclusions:

• The SCM-based HC synthesizer offers a robust solution for BIST signal generation.
• The method significantly reduces dependence on coefficient precision, enhancing linearity.
• This approach contributes to lower semiconductor production costs through efficient on-chip testing.