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Efficient Hardware Design and Implementation of the Voting Scheme-Based Convolution.

Pedro Pereira1, João Silva1, António Silva1

  • 1Algoritmi Centre, University of Minho, 4800-058 Guimarães, Portugal.

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Summary
This summary is machine-generated.

This study introduces a hardware design for voting convolution, significantly reducing energy consumption and processing time for sparse point cloud data. This innovation enhances efficiency on resource-constrained edge devices without compromising detection performance.

Keywords:
3D object detection modelsdeep learningfield-programmable gate array (FPGA)sparsityvoting convolution

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Area of Science:

  • Computer Vision
  • Hardware Acceleration
  • Edge Computing

Background:

  • Sparse point cloud data processing requires specialized convolution designs.
  • Efficient hardware implementation of sparse convolutions on resource-constrained devices is underexplored.
  • Existing methods often struggle with the computational demands of point cloud analysis.

Purpose of the Study:

  • To design a customizable hardware block for voting convolution tailored for sparse point clouds.
  • To analyze the efficiency and justification of voting convolution compared to dense convolutions in hardware.
  • To evaluate the performance and energy efficiency of the proposed hardware design on edge devices.

Main Methods:

  • Developed a novel hardware block for voting convolution, optimizing for energy efficiency and reduced memory access.
  • Conducted an in-depth analysis comparing voting convolution with dense convolutions under various conditions.
  • Integrated the hardware-accelerated voting convolution into the PointPillars model for performance evaluation.

Main Results:

  • The proposed hardware design achieved an 8.7x lower energy consumption compared to related works.
  • Processing time was improved by approximately 55% due to reduced data memory access.
  • Integration into PointPillars resulted in performance improvements ranging from 23.05% to 80.44%.

Conclusions:

  • The customizable voting convolution hardware block offers significant energy and processing speed advantages for sparse point cloud analysis.
  • This approach effectively addresses the challenges of running complex computer vision algorithms on edge devices.
  • The hardware acceleration demonstrates practical applicability and substantial benefits for real-time point cloud processing tasks.