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Updated: Sep 24, 2025

Acute In Vivo Electrophysiological Recordings of Local Field Potentials and Multi-unit Activity from the Hyperdirect Pathway in Anesthetized Rats

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Published on: June 22, 2017

Towards in vivo neural decoding.

Daniel Valencia¹, Amir Alimohammad¹

¹Department of Electrical and Computer Engineering, San Diego State University, San Diego, USA.

Biomedical Engineering Letters

|May 9, 2022

Summary

This summary is machine-generated.

Researchers explored in vivo neural decoding using high-density electrodes, potentially bypassing spike sorting. They developed an efficient, low-power processor for neural network operations, enabling real-time brain-computer interfaces.

Keywords:

Application-specific integrated circuits Brain-machine interfaces Neural decoding

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Area of Science:

Neuroscience
Biomedical Engineering
Computer Engineering

Background:

Conventional spike sorting and motor decoding algorithms require external computing devices.
Advancements in high-density electrodes offer potential for in vivo neural decoding without traditional spike sorting.

Purpose of the Study:

To explore the feasibility of in vivo neural decoding, both with and without spike sorting.
To evaluate the efficiency of neural network models for motor decoding using sorted and unsorted neural activity.
To design and implement a custom processor for efficient neural network operations in vivo.

Main Methods:

Evaluation of neural network-based models for motor decoding.
Performance comparison of decoding schemes on sorted single-unit and unsorted multi-unit activity.
Design and fabrication of a custom programmable processor for neural network computations using a 180-nm CMOS process.

Main Results:

Demonstrated the efficiency of neural network models for reliable motor decoding.
Evaluated decoding performance on both sorted and unsorted neural data.
Developed a novel, low-power (12 mW), compact (49 mm) processor for neural network operations, suitable for in vivo application.

Conclusions:

In vivo neural decoding is feasible, potentially eliminating the need for spike sorting.
The custom-designed processor enables efficient, real-time neural network execution for brain-computer interfaces.
The developed system operates within safe power and area constraints for implantation.