Novel Modeling Approach to Analyze Threshold Voltage Variability in Short Gate-Length (15-22 nm) Nanowire FETs with...

In this study, threshold voltage (V_th) variability was investigated in silicon nanowire field-effect transistors (SNWFETs) with short gate-lengths of 15-22 nm and various channel diameters (D_NW) of 7, 9, and 12 nm. Linear slope and nonzero y-intercept were observed in a Pelgrom plot of the standard deviation of V_th (σV_th), which originated from random and process variations. Interestingly, the slope and y-intercept differed for each D_NW, and σV_th was the smallest at a median D_NW of 9 nm. To analyze the observed D_NW tendency of σV_th, a novel modeling approach based on the error propagation law was proposed. The contribution of gate-metal work function, channel dopant concentration (N_ch), and D_NW variations (WFV, ∆N_ch, and ∆D_NW) to σV_th were evaluated by directly fitting the developed model to measured σV_th. As a result, WFV induced by metal gate granularity increased as channel area increases, and the slope of WFV in Pelgrom plot is similar to that of σV_th. As D_NW decreased, SNWFETs became robust to ∆N_ch but vulnerable to ∆D_NW. Consequently, the contribution of ∆D_NW, WFV, and ∆N_ch is dominant at D_NW of 7 nm, 9 nm, and 12, respectively. The proposed model enables the quantifying of the contribution of various variation sources of V_th variation, and it is applicable to all SNWFETs with various L_G and D_NW.