The floating body effect of a WSe₂ transistor with volatile memory performance

The floating body effect in Meta-Stable-Dip RAM (MSDRAM) has been broadly employed in implementing single-transistor capacitor-less (1T0C) dynamic random access memory (DRAM) cells to break through the limitation of finite size reduction of peripheral capacitors. However, the majority of them were broadly demonstrated in conventional CMOS technology, while emerging semiconductor systems are rarely explored. Here, we creatively explore exfoliated multilayer tungsten diselenide (WSe₂) for the application of 1T0C DRAM, breaking the limitation of channel thickness in the traditional architecture. Through the comparison of the electrical characteristics among three dual-gate transistors with different lengths of top-gate, we demonstrated the essential role of the floating body effect in achieving the function of 1T0C DRAM displaying two distinct states that are differentiated by hole population within the floating body. Moreover, according to the analysis of in situ electrostatic force microscopy (EFM) measurements and theoretical calculation via density functional theory (DFT), the injection of holes through band-to-band (B2B) tunneling can be ascribed to the effectively electrostatic modulation. These consequences prove our innovative concept to achieve the function of 1T0C DRAM through employing the ML WSe₂, which is a vital step toward the breakthrough of the inherent limitations of DRAM cells.