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Related Concept Videos

P-N junction01:11

P-N junction

671
A p-n junction is formed when p-type and n-type semiconductor materials are joined together. At the interface of the p-n junction, holes from the p-side and electrons from the n-side begin to diffuse into the opposite sides due to the concentration gradient. This diffusion of carriers leads to a region around the junction where there are no free charge carriers, known as the depletion region. The charge density within the depletion region for the n-side and p-side can be described by the...
671
Biasing of P-N Junction01:16

Biasing of P-N Junction

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The operation of a p-n junction diode involves various biasing conditions, including forward bias, reverse bias, and equilibrium.
In equilibrium, no external voltage is applied across the p-n junction. The depletion region is formed at the junction interface due to the diffusion of carriers, which leaves behind charged dopants, acceptors on the p-side, and donors on the n-side. These immobile charges create an electric field that prevents further diffusion of carriers. The related energy band...
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Bipolar Junction Transistor01:22

Bipolar Junction Transistor

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Bipolar Junction Transistors (BJTs) are essential elements in electronic circuits, playing a crucial role in the functionality of amplifiers, memories, and microprocessors. These transistors can be designed as NPN or PNP based on their doping patterns. They consist of three layers: the emitter, base, and collector. The configuration of these layers and their respective doping levels—with N-type or P-type impurities—define the transistor's type and its operational...
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Biasing of Metal-Semiconductor Junctions01:27

Biasing of Metal-Semiconductor Junctions

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Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
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Biasing of FET01:22

Biasing of FET

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Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
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MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

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Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
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An Ultralow Power Mixed Dimensional Heterojunction Transistor Based on the Charge Plasma pn Junction.

Onejae Sul1, Hojun Seo2, Eunsuk Choi2

  • 1Hanyang University, Seoul, 04763, Republic of Korea.

Small (Weinheim an Der Bergstrasse, Germany)
|June 27, 2022
PubMed
Summary

This study demonstrates a novel hole doping method for tungsten disulfide (WS2) 2D materials using silicon substrates. This breakthrough enables ultralow-power transistors and diodes for advanced microelectronics.

Keywords:
diodesdopingheterojunctionshomojunctionssilicontransistorstransition metal dichalcogenides

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Area of Science:

  • Materials Science
  • Condensed Matter Physics
  • Nanotechnology

Background:

  • Reliable doping of 2D materials is crucial for next-generation microelectronics, especially hole doping for transition metal dichalcogenides (TMDCs).
  • Most TMDCs are inherently electron-doped due to sulfur vacancies, hindering their application in silicon-based electronics.
  • The development of sub-10 nm channel length devices requires advanced doping strategies to sustain Moore's Law.

Purpose of the Study:

  • To develop a reliable hole doping method for tungsten disulfide (WS2), a key 2D material.
  • To demonstrate the fabrication of ultralow-power transistors and diodes using this doping technique.
  • To investigate the performance of WS2-based devices formed via a charge plasma pn heterojunction.

Main Methods:

  • Hole doping of WS2 was achieved using a silicon substrate as the dopant medium.
  • Fabrication of ultralow-power current sourcing transistors and gated WS2 pn diodes.
  • Formation of a charge plasma pn heterojunction between WS2 thin-film and heavily doped bulk silicon.

Main Results:

  • Achieved ultralow switchable output current down to 0.01 nA µm⁻¹ and an off-state current of approximately 1 × 10⁻¹⁴ A µm⁻¹.
  • Demonstrated static power consumption in the range of 1 fW µm⁻¹ to 1 pW µm⁻¹.
  • Obtained an output current ratio of 10³ at a 0.1 V supply voltage, with stable output current (<3% variation) regardless of gate voltage.

Conclusions:

  • The developed method provides a reliable approach for hole doping of WS2, addressing a critical need in 2D material research.
  • The charge plasma heterojunction enables the creation of highly efficient, ultralow-power electronic devices.
  • This work paves the way for the integration of 2D materials into future microelectronic circuits, potentially replacing silicon in advanced applications.