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Selective Overview of 3D Heterogeneity in CMOS
Cheng Li1, Zijin Pan1, Xunyu Li1
1Department of Electrical and Computer Engineering, University of California, Riverside, CA 92521, USA.
Nanomaterials (Basel, Switzerland)
|July 27, 2022
Summary
Heterogeneous integration (HI) enhances complementary metal-oxide-semiconductor (CMOS) chip performance beyond Moore's Law scaling. This review covers selected HI structures validated in CMOS platforms for advanced functionalities.
Area of Science:
- Materials Science
- Electrical Engineering
- Semiconductor Physics
Background:
- Moore's Law is facing significant challenges, necessitating alternative approaches for integrated circuit (IC) performance enhancement.
- Heterogeneous Integration (HI) offers a viable path to improve IC performance by incorporating diverse functionalities beyond traditional logic.
- Smart chip complexity requires advancements across the entire information chain, from sensing to actuation, for effective human-world interaction.
Purpose of the Study:
- To provide a topical overview of selected heterogeneous integration structures.
- To highlight HI structures that have been successfully validated on CMOS platforms.
- To showcase how HI enables enhanced functionalities and system-level intelligence in ICs.
Main Methods:
- Review of existing literature on heterogeneous integration technologies.
- Focus on HI structures implemented within CMOS platforms.
- Topical selection of validated HI structures for detailed discussion.
Main Results:
- Discussion of a stacked-via vertical magnetic-cored inductor structure in CMOS.
- Analysis of a metal wall structure in the back end of line (BEOL) for noise suppression.
- Exploration of above-IC graphene nano-electromechanical system (NEMS) switch and nano-crossbar array electrostatic discharge (ESD) protection structures, and graphene ESD interconnects.
Conclusions:
- Heterogeneous integration is crucial for advancing IC performance beyond classical scaling limits.
- Validated HI structures demonstrate the potential for increased functionality and smarter system chips.
- Future IC development will likely rely on diverse HI approaches to meet complex demands.
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