Related Experiment Video
Updated: Jul 22, 2026

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
Published on: December 7, 2017
Surface-potential-modulated piezoresistive effect of core-shell 3C-SiC nanowires
Akio Uesugi1, Shinya Nakata1, Kodai Inoyama1
1Department of Mechanical Engineering, Graduate School of Engineering, Kobe University, Kobe, Japan.
Abstract:
The effect of surface potential on the carrier mobility and piezoresistance of core-shell silicon carbide nanowires (SiC NWs) was investigated to realize small and sensitive SiC-microelectromechanical systems sensors. The p-type cubic crystalline SiC (3C-SiC) NWs were synthesized via the vapor-liquid-solid method and coated with silicon dioxide (SiO2) or aluminum oxide (Al2O3) dielectric shells to form core-shell structured NWs with different surface potentials. Four-point bending devices (FBDs) with a field-effect transistor (FET) configuration integrating a single core-shell 3C-SiC NW as the FET channel were fabricated to apply an additional electric field and strain to the core-shell 3C-SiC NWs. The fixed oxide charge densities of the SiO2and Al2O3shells showed positive and negative values, respectively, which were equivalent to electric fields of the order of several hundred thousand volt per centimeter in absolute values. In the core-shell 3C-SiC NWs with originally low impurity concentrations, the electric field induced by the fixed oxide charge of the shells can determine not only the electrical conduction but also the charge carriers in the NWs. Bending tests using the FBDs showed that the piezoresistive effect of the SiO2-coated NW was almost the same as that of the as-grown 3C-SiC NW reported previously, regardless of the gate voltage, whereas that of the Al2O3-coated NW was considerably enhanced at negative gate voltages. The enhancement of the piezoresistive effect was attributed to the piezo-pinch effect, which was more pronounced in the NW, where the carrier density at the core-shell interface is enhanced by the electric field of the dielectric.
Related Concept Videos
Induced Electric Fields: Applications
Biasing of P-N Junction
In equilibrium, no external voltage is applied across the p-n junction. The depletion region is formed at the junction interface due to the diffusion of carriers, which leaves behind charged dopants, acceptors on the p-side, and donors on the n-side. These immobile charges create an electric field that prevents further diffusion of carriers. The related energy band...
Metal-Semiconductor Junctions
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The semiconductor's...
Biasing of Metal-Semiconductor Junctions
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
MOSFET: Enhancement Mode
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no current...

