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Edge-Contact MoS2 Transistors Fabricated Using Thermal Scanning Probe Lithography
Ana Conde-Rubio1, Xia Liu1, Giovanni Boero1
1Microsystems Laboratory, École Polytechnique Fédérale de Lausanne (EPFL), 1015 Lausanne, Switzerland.
ACS Applied Materials & Interfaces
|September 7, 2022
Summary
Thermal scanning probe lithography (t-SPL) gently fabricates molybdenum disulfide (MoS2) field-effect transistors (FETs). This novel method avoids electron damage, achieving high on/off ratios for advanced 2D semiconductor devices.
Area of Science:
- Materials Science and Engineering
- Nanotechnology
- Semiconductor Device Fabrication
Background:
- Two-dimensional materials (2DMs), especially 2D semiconductors, are crucial for next-generation electronics.
- Conventional fabrication methods like electron beam lithography can damage delicate 2DMs, degrading their properties.
- Gentle fabrication techniques are needed to preserve the integrity of 2DMs during device integration.
Purpose of the Study:
- To demonstrate the use of thermal scanning probe lithography (t-SPL) for fabricating molybdenum disulfide (MoS2)-based field-effect transistors (FETs).
- To specifically showcase t-SPL for creating edge-contact MoS2 FETs, a novel application.
- To achieve high-performance characteristics in MoS2 FETs fabricated with a non-damaging lithography technique.
Main Methods:
- Utilized thermal scanning probe lithography (t-SPL) for patterning and Ar+ milling for etching the MoS2.
- Integrated etching and metal deposition steps within a single vacuum process to prevent atmospheric contamination.
- Fabricated edge-contact MoS2 FETs using a combination of hot-tip patterning and Ar+ milling.
Main Results:
- Successfully fabricated functional edge-contact MoS2 FETs using the developed t-SPL process.
- Achieved high on/off ratios of up to 10^8 at room temperature in air.
- Observed even higher on/off ratios, reaching 10^9 in vacuum, comparable to state-of-the-art devices.
Conclusions:
- Thermal scanning probe lithography is a viable and gentle method for fabricating high-performance 2D semiconductor devices like MoS2 FETs.
- The t-SPL technique, combined with in-situ processing, effectively preserves the quality of MoS2, leading to excellent device performance.
- This approach offers a promising alternative for the scalable and reliable manufacturing of advanced 2D electronic devices.
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