A High SNR Improvement CMOS Analog Accumulator with Charge Compensation Technique
Zhongjie Guo1, Chen Li1, Ruiming Xu1
1Department of Electronic Engineering, Xi'an University of Technology, No. 5 Jinhua South Road, Xi'an 710054, China.
Sensors (Basel, Switzerland)
|September 23, 2022
Summary
This study introduces a 128-stage analog Time Delay Integration (TDI) CMOS accumulator. Adaptive compensation techniques significantly improve the signal-to-noise ratio (SNR) by reducing charge loss in analog circuits.
Area of Science:
- Analog integrated circuit design
- CMOS technology
- Signal processing
Background:
- Parasitic effects in analog circuits cause charge loss, degrading signal quality.
- Time Delay Integration (TDI) is crucial for enhancing signal-to-noise ratio (SNR) in imaging and sensing applications.
- Existing analog accumulators face challenges in compensating for charge loss.
Purpose of the Study:
- To propose and verify an analog domain Time Delay Integration (TDI) CMOS analog accumulator with 128 stages.
- To implement an adaptive compensation technique for charge loss caused by parasitic effects.
- To demonstrate significant SNR improvement in the proposed 128-stage accumulator.
Main Methods:
- Design of a 7.75 kHz line rate, 128-stage analog domain TDI CMOS analog accumulator.
- Implementation of an adaptive compensation mechanism utilizing alternate charging of capacitor plates and a positive feedback capacitor.
- Post-layout simulation to verify the circuit's performance and effectiveness.
Main Results:
- The proposed circuit successfully compensates for charge loss during sampling and holding phases.
- Post-layout simulations confirmed the effectiveness of the adaptive compensation technique.
- A significant SNR improvement of up to 20.9 dB was achieved for the 128-stage accumulation.
Conclusions:
- The developed analog domain TDI CMOS accumulator effectively mitigates parasitic effects.
- The adaptive compensation strategy provides substantial SNR enhancement in multi-stage analog accumulators.
- This work offers a promising solution for improving performance in analog signal processing systems.
Related Concept Videos
Design Example: Capacitance Multiplier Circuit
922
In integrated circuit technology, a capacitance multiplier is often utilized to produce a larger capacitance value when a small physical capacitance falls short. This is achieved by a circuit that multiplies capacitance values by a factor of up to 1000, such that a 10-pF capacitor can replicate the performance of a 100-nF capacitor.
The circuit illustrated in Figure 1 below incorporates two op-amps, with the first operating as a voltage follower and the second acting as an inverting amplifier.
The circuit illustrated in Figure 1 below incorporates two op-amps, with the first operating as a voltage follower and the second acting as an inverting amplifier.
922
MOS Capacitor
937
A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
937
Voltage Doubler Circuit
792
A voltage doubler circuit integrates two main components: a clamping section and a rectifier section. The clamping section consists of a capacitor (C1) and a diode (D1), whereas the rectifier section is equipped with another diode (D2) and capacitor (C2). This circuit produces an output voltage with twice the amplitude of the sinusoidal input voltage.
792
Upsampling
297
Managing signal sampling rates is essential in digital signal processing to maintain signal integrity. A decimated signal, characterized by a reduced frequency range due to its lower sampling rate, can be upsampled by inserting zeros between each sample. This upsampling process expands the original spectrum and introduces repeated spectral replicas at intervals dictated by the new Nyquist frequency. To refine this zero-inserted sequence, it is passed through a lowpass filter with a cutoff...
297
Second-order Op Amp Circuits
414
Implementing second-order low-pass filters in audio systems is crucial in refining audio signals by eliminating undesirable high-frequency noise. These filters typically involve second-order op-amp circuits configured as voltage followers, encompassing two nodes with distinct storage elements.
The analysis of such circuits follows a systematic approach, similar to the second-order RLC circuits. In practical scenarios, bulky inductors are rarely employed due to their size and weight. This means...
The analysis of such circuits follows a systematic approach, similar to the second-order RLC circuits. In practical scenarios, bulky inductors are rarely employed due to their size and weight. This means...
414
Small-Signal Analysis of MOSFET Amplifiers
702
In small-signal analysis, a MOSFET transistor amplifier acts as a linear amplifier when operating in its saturation region. The gate-to-source voltage (VGS) of the MOSFET is the sum of the DC biasing voltage and the small time-varying input signal. This combination sets up the operating point and modulates the drain current (ID) that flows from the drain to the source. When a small AC signal is superimposed on the DC bias voltage at the gate, the instantaneous drain current comprises three...
702


