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A Reconfigurable Visual-Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile

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This study introduces a reconfigurable accelerator for visual-inertial odometry (VIO) systems in autonomous mobile robots (AMRs). The design offers high efficiency and minimal accuracy loss, significantly reducing memory usage and power consumption.

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Area of Science:

  • Robotics
  • Computer Vision
  • Embedded Systems

Background:

  • Autonomous mobile robots (AMRs) increasingly rely on Visual-Inertial Odometry (VIO) for positioning.
  • Current VIO systems face challenges with algorithmic complexity, long accelerator development cycles, and limited power capacity in AMRs.

Purpose of the Study:

  • To design a reconfigurable accelerated core for VIO algorithms.
  • To achieve high area and energy efficiency, precision, and speed processing.

Main Methods:

  • Development of a novel reconfigurable accelerated core supporting diverse VIO algorithms.
  • Implementation on an FPGA and synthesis in 28 nm CMOS technology.

Main Results:

  • Negligible accuracy loss demonstrated on a standard dataset.
  • On-chip memory usage reduced to 70 KB, over 10x less than state-of-the-art.
  • Superior performance in hardware resource consumption and power dissipation compared to previous works on the same platform.

Conclusions:

  • The proposed reconfigurable accelerator significantly enhances VIO system efficiency for AMRs.
  • The design offers a practical solution for deploying advanced VIO capabilities within power and resource constraints.
  • This work paves the way for more capable and energy-efficient autonomous robots.