Energy and Space Efficient Parallel Adder Using Molecular Memristors

A breakthrough in in-memory computing technologies hinges on the development of appropriate material platforms that can overcome their existing limitations, such as larger than optimal footprint and multiple serial computational steps, with potential accumulation of errors. Using a molecular switching element with multiple non-monotonic and deterministic transitions, the device count and the number of computational steps can be substantially reduced. With molecular materials, however, the realization of a reliable and robust platform is an unattained goal for decades. Here, crossbar arrays with up to 64 molecular memristors are fabricated to experimentally demonstrate 8-bit serial and 4-bit parallel adders that operate for thousands of measurement cycles with an estimated error probability of 10^-16 . For performance benchmarking, a 32-bit parallel adder is designed and simulated with 268 million inputs including contributions from the peripheral circuitry showing a 47× higher energy efficiency, 93× faster operation, and 9% of the footprint, leading to 4390 times improved energy-delay product compared to a special purpose complementary metal-oxide-semiconductor (CMOS)-based multicore adder.