Energy Dissipation and Electrical Breakdown in Multilayer PtSe₂ Electronics

Investigating the energy dissipation in micro- and nanoscale is fundamental to improve the performance and reliability of two-dimensional (2D) electronics. Recently, 2D platinum selenide (PtSe₂) has drawn extensive attention in developing next-generation functional devices due to its distinctive fusion of versatile properties. Toward practical applications of PtSe₂ devices, it is essential to understand the interfacial thermal properties between PtSe₂ and its substrate. Among them, the thermal boundary conductance (TBC) has played a critical role for out-of-plane heat dissipation of PtSe₂ devices. Here, we identify the energy dissipation behavior of multilayer PtSe₂ devices and extract the actual TBC value of the PtSe₂/SiO₂ interface by Raman thermometry with electrical bias. The obtained TBC value is about 8.6 MW m^-2 K^-1, and it belongs to the low end of as-known solid-solid interfaces, suggesting possible applications regarding thermoelectric devices or others reliant on a large temperature gradient. Furthermore, the maximum current density of the PtSe₂ device determines its threshold power, which is crucial for improving device design and guiding future applications. Therefore, we explore the electrical breakdown profile of the multilayer PtSe₂ device, revealing the breakdown current density of 17.7 MA cm^-2 and threshold power density of 0.2 MW cm^-2, which are larger than typical values for commonly used aluminum and copper. These results provide key insights into the energy dissipation of PtSe₂ devices and make PtSe₂ an excellent candidate for thermal confinement applications and nanometer-thin interconnects, which will benefit the development of energy-efficient functional 2D devices.