Complementary Transistors Based on Aligned Semiconducting Carbon Nanotube Arrays.

Area of Science:

• Materials Science
• Nanotechnology
• Electrical Engineering

Background:

• High-density aligned carbon nanotube (A-CNT) arrays show promise for digital integrated circuits (ICs).
• Previous research focused on P-type field-effect transistors (P-FETs), with high-performance N-type FETs (N-FETs) remaining a challenge.
• The absence of high-performance A-CNT N-FETs hinders the development of complementary metal-oxide-semiconductor (CMOS) technology.

Purpose of the Study:

• To identify the mechanism limiting A-CNT N-FET performance with low-work-function metal contacts.
• To develop solutions for enhancing A-CNT N-FET performance to match P-FETs.
• To demonstrate scalable A-CNT CMOS technology for digital IC applications.

Main Methods:

• Investigated the hindering mechanism in A-CNT N-FETs contacted by low-work-function metals.
• Fabricated scandium (Sc)-contacted A-CNT N-FETs with a 100 nm gate length.
• Developed and tested A-CNT CMOS technology integrating both N-FETs and P-FETs.

Main Results:

• Achieved record performance for A-CNT N-FETs with an on-state current (Ion) of 800 μA/μm and transconductance (gm) of 250 μS/μm.
• Demonstrated symmetric high performance in fabricated A-CNT CMOS FETs.
• Observed electron and hole mobilities of 325 and 241 cm2 V-1 s-1, respectively, exceeding those of silicon CMOS transistors.

Conclusions:

• Overcame limitations in A-CNT N-FET fabrication, enabling high-performance devices.
• Successfully developed scalable A-CNT CMOS technology with performance comparable to silicon.
• This advancement paves the way for A-CNT-based electronics in next-generation digital ICs.