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An energy efficient design of a multi-layered crossover based 3:8 decoder using quantum-dot cellular automata.

Rajasree Das1, Md Shah Alam1, Kazi Tanvir Ahmmed1

  • 1Department of Electrical & Electronic Engineering, University of Chittagong, Chittagong-4331, Bangladesh.

Heliyon
|November 28, 2022
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Summary

This study presents an efficient 3:8 decoder using Quantum Dot Cellular Automata (QCA) technology. The novel multilayer crossover design offers improved performance, fault tolerance, and cost-effectiveness compared to existing methods.

Keywords:
DecoderInverterLogic gateMajority gateQuantum dot cellular automata

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Area of Science:

  • Nanotechnology
  • Quantum Computing
  • Digital Logic Design

Background:

  • Quantum Dot Cellular Automata (QCA) is an emerging nanotechnology offering potential advantages over CMOS technology, such as low power consumption and high speed.
  • Traditional decoder designs face limitations in terms of power, speed, and complexity.

Purpose of the Study:

  • To design and implement an efficient 3:8 decoder using QCA technology.
  • To leverage the multilayer crossover technique for enhanced performance and fault tolerance.
  • To compare the proposed QCA decoder with existing coplanar designs.

Main Methods:

  • Implementation of a 3:8 decoder using Quantum Dot Cellular Automata (QCA).
  • Utilization of a multilayer crossover technique within the QCA design.
  • Validation of the design using the QCA Designer tool.
  • Comparative analysis with existing coplanar decoder designs.

Main Results:

  • The proposed QCA 3:8 decoder demonstrates high performance and fault tolerance.
  • The multilayer crossover technique effectively eliminates crosstalk.
  • The new design exhibits reduced complexity, lower power dissipation, and is more cost-effective (approximately half the cost of coplanar designs).

Conclusions:

  • The multilayer crossover technique in QCA provides a superior approach for designing efficient decoders.
  • QCA technology, particularly with this novel design, presents a viable and advantageous alternative to traditional digital logic implementations.
  • The proposed 3:8 decoder offers significant improvements in performance, cost, and power efficiency.