Forgetting memristor based STDP learning circuit for neural networks.

Area of Science:

• Neuroscience and Neuromorphic Engineering
• Materials Science for Electronic Devices

Background:

• Memristor-based circuit implementation of spike-timing-dependent plasticity (STDP) is crucial for neural network applications.
• Pure circuit implementations of forgetting memristors and STDP remain underexplored.
• Existing memristor synapses lack the biological 'forgetting' mechanism, limiting neural network capabilities.

Purpose of the Study:

• To propose and validate a new STDP learning rule circuit utilizing a forgetting memristor.
• To investigate the impact of short-term and long-term memory synapses on neural network learning characteristics.
• To lay the groundwork for constructing time-division multiplexing neural networks with dual-memory synapses.

Main Methods:

• Design and implementation of a novel STDP learning rule circuit incorporating a forgetting memristor.
• Analysis of the memristor synapse's behavior under varying initial states and stimulus signals.
• Evaluation of the circuit's performance in a neural network application to demonstrate its availability.

Main Results:

• The proposed circuit successfully implements STDP using a forgetting memristor, exhibiting behaviors akin to biological forgetting.
• Volatile memristors demonstrate state-dependent responses to stimuli, leading to a more biologically plausible long-term potentiation (LTP) phenomenon.
• The circuit features adjustable parameters, allowing adaptation to diverse STDP learning rule conditions.

Conclusions:

• The developed forgetting memristor-based STDP circuit enables time-division multiplexing in neural networks.
• The circuit's ability to mimic biological forgetting enhances neural network learning and memory characteristics.
• This work provides a foundation for advanced neuromorphic computing architectures with sophisticated memory functions.