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A Low Memory Requirement MobileNets Accelerator Based on FPGA for Auxiliary Medical Tasks.

Yanru Lin1, Yanjun Zhang2, Xu Yang3

  • 1School of Integrated Circuits and Electronics, Beijing Institute of Technology, No. 5, South Street, Zhongguancun, Haidian District, Beijing 100081, China.

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Summary

This study introduces a novel MobileNet accelerator for efficient deployment on portable medical devices. The accelerator significantly reduces memory usage and data transfer, enabling real-time performance for complex neural networks.

Keywords:
FPGAMobileNetV2auxiliary medical tasksconvolutional neural networkhardware accelerator

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Area of Science:

  • Computer Science
  • Electrical Engineering
  • Medical Imaging

Background:

  • Convolutional Neural Networks (CNNs) offer high accuracy in medical tasks but are resource-intensive.
  • Efficient models like MobileNet reduce parameters and operations but still pose deployment challenges on resource-constrained devices.
  • Real-time performance is crucial for many auxiliary medical applications on portable devices.

Purpose of the Study:

  • To develop a specialized accelerator for MobileNet-like networks to minimize on-chip memory and data transfer.
  • To enable the deployment of efficient neural networks on portable devices with limited resources.
  • To achieve high-performance, real-time processing for medical applications.

Main Methods:

  • Designed a MobileNet accelerator featuring configurable Pointwise and Depthwise Convolution Accelerators.
  • Implemented a specific dataflow model to parallelize network operations and reduce memory footprint.
  • Introduced an innovative cache usage strategy to further minimize on-chip memory requirements.

Main Results:

  • Achieved 70.94 Frames Per Second (FPS) processing speed.
  • Required only 524.25 KB of on-chip memory.
  • Operated efficiently at 150 MHz on a Xilinx XC7Z020 FPGA.

Conclusions:

  • The proposed MobileNet accelerator effectively reduces memory and data transfer for efficient neural network deployment on FPGAs.
  • This solution addresses the limitations of resource-constrained portable devices for real-time medical applications.
  • The accelerator demonstrates a viable pathway for high-performance, low-memory neural network implementation in medical technology.