Jove
Visualize
Contact Us
JoVE
x logofacebook logolinkedin logoyoutube logo
ABOUT JoVE
OverviewLeadershipBlogJoVE Help Center
AUTHORS
Publishing ProcessEditorial BoardScope & PoliciesPeer ReviewFAQSubmit
LIBRARIANS
TestimonialsSubscriptionsAccessResourcesLibrary Advisory BoardFAQ
RESEARCH
JoVE JournalMethods CollectionsJoVE Encyclopedia of ExperimentsArchive
EDUCATION
JoVE CoreJoVE BusinessJoVE Science EducationJoVE Lab ManualFaculty Resource CenterFaculty Site
Terms & Conditions of Use
Privacy Policy
Policies

Related Concept Videos

MOS Capacitor01:25

MOS Capacitor

880
A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
880
MOSFET: Depletion Mode01:20

MOSFET: Depletion Mode

423
Depletion-mode MOSFETs represent a unique subset of MOSFET technology, functioning fundamentally differently from their enhancement-mode counterparts. Unlike enhancement MOSFETs, which require a positive gate-source voltage (Vgs) to turn on, depletion-mode MOSFETs are inherently conductive and "normally on" devices.
The primary characteristic of depletion-mode MOSFETs is their ability to conduct current between the drain and source terminals without gate bias. This inherent conductivity...
423
MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

410
Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
410
Diode: Reverse bias01:14

Diode: Reverse bias

851
A diode is reverse-biased when the positive terminal of an external voltage source is connected to the n-type material and the negative terminal to the p-type material. This configuration opposes the natural direction of current flow through the diode, effectively increasing the width of the depletion region and the barrier potential. The reverse bias condition produces a minimal leakage current, primarily due to minority charge carriers. This leakage becomes significant when the reverse...
851
MOSFET01:16

MOSFET

525
The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) plays a pivotal role in modern electronics thanks to its versatility and efficiency in controlling electrical currents. This device, also known as IGFET, MISFET, and MOSFET, has three main terminals: the Source, Drain, and Gate. MOSFETs are classified into n-channel or p-channel types based on the doping characteristics of their substrate and the source or drain regions.
In an n-MOSFET, the structure includes n-type source and drain...
525
Schottky Barrier Diode01:27

Schottky Barrier Diode

413
Schottky barrier diodes are specialized semiconductor devices characterized by their unique construction. This construction involves combining a metal layer with a moderately doped n-type semiconductor material. This combination leads to the formation of a Schottky barrier, a pivotal element that defines the diode's operational characteristics. The core functionality of Schottky barrier diodes is their capacity to allow current to flow in only one direction due to their distinctive...
413

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by
Same author

Plasmon-Induced Hot-State Multiexciton Emission from Quantum Dots Coupled to Metallic Nanocavities.

ACS nano·2026
Same author

Near-field refractometry of van der Waals crystals.

Nanophotonics (Berlin, Germany)·2025
Same author

2D Semiconductors as On-Chip Light Sources for Integrated Nanophotonics.

Nano letters·2025
Same author

On-chip multivariant COVID 19 photonic sensor based on silicon nitride double-microring resonators.

Nanophotonics (Berlin, Germany)·2024
Same author

Roadmap for Optical Metasurfaces.

ACS photonics·2024
Same author

Exploiting Zone-Folding Induced Quasi-Bound Modes to Achieve Highly Coherent Thermal Emissions.

Nano letters·2024

Related Experiment Video

Updated: Aug 3, 2025

Gradient Echo Quantum Memory in Warm Atomic Vapor
10:00

Gradient Echo Quantum Memory in Warm Atomic Vapor

Published on: November 11, 2013

12.9K

CMOS-compatible electro-optical SRAM cavity device based on negative differential resistance.

Rivka Gherabli1, Roy Zektzer1, Meir Grajower1

  • 1Department of Applied Physics, Faculty of Science, The Center for Nanoscience and Nanotechnology, The Hebrew University of Jerusalem, Jerusalem 91904, Israel.

Science Advances
|April 12, 2023
PubMed
Summary
This summary is machine-generated.

Researchers developed a CMOS-compatible optical memory device using a novel silicon diode with negative differential resistance (NDR). This breakthrough enables optical readout for future neuromorphic computing architectures.

More Related Videos

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
09:49

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

Published on: May 13, 2020

4.1K
Demonstration of Spin-Multiplexed and Direction-Multiplexed All-Dielectric Visible Metaholograms
08:48

Demonstration of Spin-Multiplexed and Direction-Multiplexed All-Dielectric Visible Metaholograms

Published on: September 25, 2020

5.8K

Related Experiment Videos

Last Updated: Aug 3, 2025

Gradient Echo Quantum Memory in Warm Atomic Vapor
10:00

Gradient Echo Quantum Memory in Warm Atomic Vapor

Published on: November 11, 2013

12.9K
In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
09:49

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

Published on: May 13, 2020

4.1K
Demonstration of Spin-Multiplexed and Direction-Multiplexed All-Dielectric Visible Metaholograms
08:48

Demonstration of Spin-Multiplexed and Direction-Multiplexed All-Dielectric Visible Metaholograms

Published on: September 25, 2020

5.8K

Area of Science:

  • Optoelectronics
  • Materials Science
  • Computer Engineering

Background:

  • Moore's Law is nearing its limit, driving demand for novel computing architectures.
  • Current optical and electro-optical computing demonstrations often lack compatibility with mainstream CMOS technology.
  • Negative differential resistance (NDR) devices offer unique electronic properties for advanced applications.

Purpose of the Study:

  • To develop a CMOS-compatible electro-optical memory device.
  • To leverage a novel silicon-based NDR diode for optical computing applications.
  • To enable bistable devices with optical readout for the telecom regime.

Main Methods:

  • Designed and fabricated a horizontal PN junction silicon diode exhibiting negative differential resistance (NDR).
  • Integrated the novel NDR diode into a photonic micro-ring resonator.
  • Demonstrated a bistable device with a fully optical readout in the telecom wavelength range.

Main Results:

  • Successfully created a CMOS-compatible electro-optical memory device.
  • The device utilizes a silicon NDR diode integrated into a micro-ring resonator.
  • Achieved a bistable operation with optical readout, compatible with telecom standards.

Conclusions:

  • The developed NDR diode and integrated device represent a significant advancement for CMOS-compatible optoelectronics.
  • This work paves the way for novel nonlinear electro-optic and neuromorphic computing structures.
  • The findings offer a pathway towards next-generation computing beyond traditional scaling limits.