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A Low-Loss 1.2 kV SiC MOSFET with Improved UIS Performance
Lijuan Wu1, Mengyuan Zhang1, Jiahui Liang1
1School of Physics & Electronic Science, Changsha University of Science & Technology, Changsha 410114, China.
Micromachines
|May 27, 2023
Summary
A novel double-trench 4H-SiC MOSFET with an integrated low-barrier diode (DT-LBDMOS) eliminates body diode degradation and reduces switching loss. This silicon carbide device offers improved avalanche stability and lower on-resistance for power electronics.
Area of Science:
- Materials Science
- Electrical Engineering
- Semiconductor Physics
Background:
- Silicon carbide (SiC) MOSFETs are crucial for high-power applications due to their superior properties.
- Traditional SiC MOSFETs face challenges like bipolar degradation of the body diode and significant switching losses.
- Improving avalanche stability and reducing on-resistance are key objectives for advanced SiC power devices.
Purpose of the Study:
- To propose and analyze a 1.2-kV-rated double-trench 4H-SiC MOSFET with an integrated low-barrier diode (DT-LBDMOS).
- To demonstrate the elimination of body diode bipolar degradation and reduction in switching losses.
- To enhance avalanche stability and improve overall device performance metrics.
Main Methods:
- Numerical simulations were employed to verify the device physics and electron transport mechanisms.
- The proposed DT-LBDMOS was compared against the gate p-shield trench 4H-SiC MOSFET (GPMOS).
- Key performance parameters including reverse on-voltage, reverse recovery charge, gate-to-drain capacitance, switching losses, and on-resistance were evaluated.
- Unclamped inductive switching (UIS) tests were conducted to assess avalanche energy and stability.
Main Results:
- The integrated low-barrier diode (LBD) creates an easier electron transfer path, eliminating body diode bipolar degradation.
- Compared to GPMOS, DT-LBDMOS exhibits a 37.8% lower reverse on-voltage (1.54 V vs. 2.46 V).
- Significant reductions were observed in reverse recovery charge (28%), gate-to-drain capacitance (76%), turn-on loss (52%), and turn-off loss (35%).
- Specific on-resistance decreased by 34% due to weakened interface state scattering, improving both HF-FOM and P-FOM.
- Enhanced avalanche energy and stability were confirmed through UIS testing.
Conclusions:
- The proposed DT-LBDMOS effectively overcomes the bipolar degradation issue in SiC MOSFETs.
- The integrated LBD significantly enhances device performance, including lower losses and improved stability.
- DT-LBDMOS demonstrates considerable potential for practical applications in high-performance power electronics.
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