Jove
Visualize
Contact Us
JoVE
x logofacebook logolinkedin logoyoutube logo
ABOUT JoVE
OverviewLeadershipBlogJoVE Help Center
AUTHORS
Publishing ProcessEditorial BoardScope & PoliciesPeer ReviewFAQSubmit
LIBRARIANS
TestimonialsSubscriptionsAccessResourcesLibrary Advisory BoardFAQ
RESEARCH
JoVE JournalMethods CollectionsJoVE Encyclopedia of ExperimentsArchive
EDUCATION
JoVE CoreJoVE BusinessJoVE Science EducationJoVE Lab ManualFaculty Resource CenterFaculty Site
Terms & Conditions of Use
Privacy Policy
Policies

Related Concept Videos

MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

391
Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
391
MOSFET: Depletion Mode01:20

MOSFET: Depletion Mode

400
Depletion-mode MOSFETs represent a unique subset of MOSFET technology, functioning fundamentally differently from their enhancement-mode counterparts. Unlike enhancement MOSFETs, which require a positive gate-source voltage (Vgs) to turn on, depletion-mode MOSFETs are inherently conductive and "normally on" devices.
The primary characteristic of depletion-mode MOSFETs is their ability to conduct current between the drain and source terminals without gate bias. This inherent conductivity...
400

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by
Same author

SD<sup>2</sup>-SNN: Self-distillation and structural decomposition framework for SNNs in continual learning.

Neural networks : the official journal of the International Neural Network Society·2026
Same author

The GSK3/SHAGGY-like OsGSK3 phosphorylates and inhibits phase separation of OsFCA at Ser-43 and Ser-45 to regulate brassinosteroid signaling and rice architecture.

The New phytologist·2026
Same author

Intron editing of RISBZ1 confers thermotolerance for grain filling in rice.

Journal of integrative plant biology·2026
Same author

Dual functions of OsCesAs in modulating grain size and culm mechanical strength in rice.

Plant physiology and biochemistry : PPB·2026
Same author

Comparative evaluation of urine, whole blood, and serum as biological matrices for human biomonitoring of neonicotinoid insecticides and metabolites.

Journal of hazardous materials·2026
Same author

Lipid-associated macrophage remodeling is present in the tumor microenvironment after high-grade glioma recurrence.

IBRO neuroscience reports·2026

Related Experiment Video

Updated: Jul 25, 2025

Focused Ion Beam Fabrication of LiPON-based Solid-state Lithium-ion Nanobatteries for In Situ Testing
10:58

Focused Ion Beam Fabrication of LiPON-based Solid-state Lithium-ion Nanobatteries for In Situ Testing

Published on: March 7, 2018

10.2K

A FIN-LDMOS with Bulk Electron Accumulation Effect.

Weizhong Chen1,2, Zubing Duan2, Hongsheng Zhang1

  • 1College of Electronics Engineering, Chongqing University of Posts and Telecommunications, Chongqing 400065, China.

Micromachines
|June 28, 2023
PubMed
Summary
This summary is machine-generated.

A novel Silicon-On-Insulator (SOI) LDMOS transistor achieves ultralow on-resistance using a FIN gate and superjunction trench gate for Bulk Electron Accumulation (BEA). This design significantly reduces specific on-resistance and enhances the figure of merit (FOM) beyond silicon limits.

Keywords:
BV and Ron,spbulk electron accumulation (BEA)extended drain (ED)extended superjunction trench gate

More Related Videos

In Situ Neutron Powder Diffraction Using Custom-made Lithium-ion Batteries
11:25

In Situ Neutron Powder Diffraction Using Custom-made Lithium-ion Batteries

Published on: November 10, 2014

15.8K
All-electronic Nanosecond-resolved Scanning Tunneling Microscopy: Facilitating the Investigation of Single Dopant Charge Dynamics
11:33

All-electronic Nanosecond-resolved Scanning Tunneling Microscopy: Facilitating the Investigation of Single Dopant Charge Dynamics

Published on: January 19, 2018

9.7K

Related Experiment Videos

Last Updated: Jul 25, 2025

Focused Ion Beam Fabrication of LiPON-based Solid-state Lithium-ion Nanobatteries for In Situ Testing
10:58

Focused Ion Beam Fabrication of LiPON-based Solid-state Lithium-ion Nanobatteries for In Situ Testing

Published on: March 7, 2018

10.2K
In Situ Neutron Powder Diffraction Using Custom-made Lithium-ion Batteries
11:25

In Situ Neutron Powder Diffraction Using Custom-made Lithium-ion Batteries

Published on: November 10, 2014

15.8K
All-electronic Nanosecond-resolved Scanning Tunneling Microscopy: Facilitating the Investigation of Single Dopant Charge Dynamics
11:33

All-electronic Nanosecond-resolved Scanning Tunneling Microscopy: Facilitating the Investigation of Single Dopant Charge Dynamics

Published on: January 19, 2018

9.7K

Area of Science:

  • Semiconductor device physics
  • Power electronics
  • Materials science

Background:

  • Silicon-On-Insulator (SOI) LDMOS transistors are crucial for power applications.
  • Reducing specific on-resistance (R_on,sp) is a key challenge for improving device performance.
  • Existing designs face limitations in balancing breakdown voltage and on-resistance.

Purpose of the Study:

  • To propose and investigate a novel thin SOI LDMOS with ultralow R_on,sp.
  • To explore the physical mechanism behind the enhanced performance using TCAD simulations.
  • To achieve a figure of merit (FOM) exceeding the conventional silicon limit.

Main Methods:

  • Device fabrication and characterization (implied by proposal and investigation).
  • TCAD (Technology Computer-Aided Design) simulations using Sentaurus software.
  • Analysis of device operation in both on-state and off-state conditions.

Main Results:

  • A FIN gate and extended superjunction trench gate structure was implemented.
  • Bulk Electron Accumulation (BEA) effect achieved through integrated diodes and gate potential extension.
  • Ultralow R_on,sp of 1.84 mΩ·cm⁻² and breakdown voltage (BV) of 314 V demonstrated.
  • High figure of merit (FOM) of 53.49 MW/cm², surpassing the RESURF silicon limit.

Conclusions:

  • The proposed SOI LDMOS with BEA effect significantly reduces R_on,sp.
  • The device design overcomes the trade-off between R_on,sp and drift doping concentration.
  • This technology offers a pathway to break through existing silicon-based power device limitations.