Implementation of Gate-All-Around Gate-Engineered Charge Plasma Nanowire FET-Based Common Source Amplifier

Area of Science:

• Semiconductor device physics
• Nanotechnology
• Electronic circuit design

Background:

• Gate-All-Around (GAA) structures offer superior gate control for nanowire field-effect transistors.
• Charge plasma dopingless techniques reduce fabrication complexity and variability.
• Gate engineering, including dual-material gates (DMG) and gate stacks (GS), is crucial for optimizing device performance.

Purpose of the Study:

• To evaluate the analog and RF performance of a novel Gate-Engineered Gate-All-Around Charge Plasma Nanowire Field Effect Transistor (GAA-DMG-GS-CP NW-FET).
• To compare the proposed device's performance against a standard Gate-All-Around Single-Material Gate Charge Plasma Nanowire Field Effect Transistor (GAA-SMG-CP NW-FET).
• To implement and analyze a common source (CS) amplifier circuit using the proposed NW-FET.

Main Methods:

• Device simulation using the Silvaco TCAD tool.
• Incorporation of dual-material gate (DMG) and gate stack (GS) engineering.
• Charge plasma dopingless fabrication approach using metal contacts.
• Lookup table (LUT) based implementation of a common source amplifier circuit.

Main Results:

• The GAA-DMG-GS-CP NW-FET demonstrated significantly improved current characteristics compared to the GAA-SMG-CP NW-FET.
• The common source amplifier circuit using the proposed device achieved a gain of 15.06 dB.
• The dopingless technique effectively eliminated doping-related fluctuations and reduced the thermal budget.

Conclusions:

• The proposed GAA-DMG-GS-CP NW-FET exhibits superior analog, RF, and circuit performance.
• The device's enhanced characteristics make it a strong candidate for future nanoscale and low-power electronic applications.
• Gate engineering and dopingless techniques are effective strategies for advancing NW-FET technology.