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Related Experiment Video

Updated: Jul 19, 2025

Design, Surface Treatment, Cellular Plating, and Culturing of Modular Neuronal Networks Composed of Functionally Inter-connected Circuits
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Neuroevolution-Based Network Architecture Evolution in Semiconductor Manufacturing.

Yen-Wei Feng1, Bing-Ru Jiang1, Albert Shihchun Lin1

  • 1Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu 300, Taiwan.

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Summary
This summary is machine-generated.

Neuroevolution (NE) automatically optimizes model architectures for intelligent manufacturing, outperforming traditional multilayer perceptron (MLP) models in semiconductor process modeling. This approach efficiently integrates physical constraints without requiring domain expertise.

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Area of Science:

  • Materials Science
  • Computer Science
  • Electrical Engineering

Background:

  • Developing accurate models for intelligent manufacturing, especially in semiconductor fabrication, is challenging due to complex physical processes and the need for extensive trial-and-error.
  • Traditional methods often struggle to embed domain knowledge and physical constraints effectively into model architectures.
  • Semiconductor manufacturing involves intricate steps like oxidation, etching, implantation, annealing, diffusion, and chemical-mechanical polishing, each requiring precise modeling.

Purpose of the Study:

  • To automatically search for optimized model architectures using a neuroevolution-based approach for semiconductor manufacturing.
  • To develop a model that can rapidly build suitable networks while integrating practical physical constraints without explicit domain knowledge extraction.
  • To compare the performance of the neuroevolution (NE) model against a traditional multilayer perceptron (MLP) model for predicting silicon-germanium (SiGe) heterojunction bipolar transistor collector current.

Main Methods:

  • Utilized a neuroevolution (NE) approach to automatically discover optimal model architectures.
  • Employed Technology Computer-Aided Design (TCAD) generated data for silicon-germanium (SiGe) heterojunction bipolar transistor collector current as the target dataset.
  • Used six key process parameters (oxidation, dry/wet etching, implantation, annealing, diffusion, chemical-mechanical polishing) as model inputs.

Main Results:

  • The NE model achieved significantly lower error metrics compared to the MLP model.
  • Mean square errors for the NE model were 3.285 × 10-7 (train) and 1.661 × 10-7 (validation), versus 1.317 × 10-6 and 7.215 × 10-7 for MLP.
  • Mean absolute percentage error on the test set was 0.097 for NE, substantially better than 0.216 for MLP, indicating superior predictive accuracy and better physical insight extraction.

Conclusions:

  • Neuroevolution-based model architecture search offers a promising and efficient method for intelligent manufacturing applications in semiconductor fabrication.
  • The NE approach successfully integrates physical constraints and achieves faster turnaround times compared to traditional methods.
  • The study demonstrates that NE models possess a superior ability to extract physical insights from data compared to conventional MLP models.