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Wafer-Scale Synthesis of 2D Materials by an Amorphous Phase-Mediated Crystallization Approach
Suman Jaiswal1, Parvin Fathi-Hafshejani1, Baha Yakupoglu1
1Department of Electrical and Computer Engineering, Auburn University, Auburn, Alabama 36849, United States.
Abstract:
The interest in the wafer-scale growth of two-dimensional (2D) materials, including transition metal dichalcogenides (TMDCs), has been rising for transitioning from lab-scale devices to commercial-scale systems. Among various synthesis techniques, physical vapor deposition, such as pulsed laser deposition (PLD), has shown promise for the wafer-scale growth of 2D materials. However, due to the high volatility of chalcogen atoms (e.g., S and Se), films deposited by PLD usually suffer from a lack of stoichiometry and chalcogen deficiency. To mitigate this issue, excess chalcogen is necessary during the deposition, which results in problems like uniformity or not being repeatable. This study demonstrates a condensed-phase or amorphous phase-mediated crystallization (APMC) approach for the wafer-scale synthesis of 2D materials. This method uses a room-temperature PLD process for the deposition and formation of amorphous precursors with controlled thicknesses, followed by a post-deposition crystallization process to convert the amorphous materials to crystalline structures. This approach maintains the stoichiometry of the deposited materials throughout the deposition and crystallization process and enables the large-scale synthesis of crystalline 2D materials (e.g., MoS2 and WSe2) on Si/SiO2 substrates, which is critical for future wafer-scale electronics. We show that the thickness of the layers can be digitally controlled by the number of laser pulses during the PLD phase. Optical spectroscopy is used to monitor the crystallization dynamics of amorphous layers as a function of annealing temperature. The crystalline quality, domain sizes, and the number of layers were explored using nanoscale and atomistic characterization (e.g., AFM, STEM, and EDS) along with electrical characterization to explore process-structure-performance relationships. This growth technique is a promising method that could potentially be adopted in conventional semiconductor industries for wafer-scale manufacturing of next-generation electronic and optoelectronic devices.
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