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Updated: Jul 17, 2025

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
Published on: July 24, 2015
Direct etching of nano/microscale patterns with both few-layer graphene and high-depth graphite structures by the
1College of Information, Mechanical and Electrical Engineering, Shanghai Normal University, Shanghai, China.
Abstract:
The development of raster STM electric lithography has enabled the etching of nano/microscale patterns on both few-layer graphene (FLG) and high-depth graphite structures on the bulk HOPG substrates under ambient conditions. This approach utilises a nanoscale probe tip as a machining tool to directly fabricate conductive sample surfaces without the need for resists or masks. Compared to conventional nano/micro machining methods, the capability of ultraaccurate fabrication of nanoscale patterns using this technique is unmatched. The resulting FLG structures exhibit ultrasmooth flat bottoms and uniformly controlled depths ranging from 0.34 to 3.0 nm (less than 10 layers). This work represents a significant advancement as it demonstrates the perfect etching of FLG structures in designated nano/microscale regions using raster STM electric lithography in the constant current mode, which reaches the limitation of top-down manufacturing techniques. Additionally, raster STM electric lithography in the constant height mode can directly etch high-depth structures (up to ∼100 nm). The geometric shape and number of layers of the etched graphene structures determined by either local anodic oxidation (LAO) or the electric discharge (ED) mechanism. The LAO mechanism results in less debris and smoother edges compared to the ED mechanism, which is caused by the random electrical discharge between the tip and the sample. The well-controlled raster STM electric lithography technique is believed to be a promising and facile approach for constructing nano/microscale graphene-based devices.

