A multi-functional arbitrary timing generator based on a digital-to-time converter.

Area of Science:

• Electrical Engineering
• Signal Processing
• Instrumentation

Background:

• Accurate timing signal generation is crucial for advanced electronic systems and testing.
• Existing digital-to-time converters often face limitations in resolution and flexibility.
• Field-programmable gate arrays (FPGAs) offer reconfigurable hardware platforms for custom signal generation.

Purpose of the Study:

• To propose and validate a new high-resolution digital-to-time converter architecture.
• To achieve ultra-high timing resolution by leveraging the vertical resolution of a digital-to-analog converter (DAC).
• To enable flexible generation of arbitrarily distributed random timing signals and editable timing sequences.

Main Methods:

• Developed a novel digital-to-time converter architecture integrating an FPGA and a DAC.
• Implemented a real-time time-amplitude mapping algorithm to convert DAC vertical resolution to timing resolution.
• Utilized Xilinx XCKU040 FPGA and Texas Instruments DAC37J82 for experimental verification.

Main Results:

• Achieved a timing resolution of 1 picosecond (ps).
• Demonstrated a wide time range from 4.2 nanoseconds (ns) to 999 seconds (s).
• Successfully realized arbitrarily distributed random timing signals, editable sequences (1-128k length), and signal bursts with excellent nonlinearity.

Conclusions:

• The proposed FPGA-DAC architecture offers ultra-high timing resolution and flexibility.
• The real-time mapping algorithm effectively translates DAC resolution to timing precision.
• This versatile method is adaptable to existing hardware and meets diverse testing requirements.